When a circuit external to an asynchronous (self-timed) memory requests a read operation on the asynchronous memory, the asynchronous memory typically performs the read operation on the rising edge of a clock signal provided by the external circuit. A sense amplifier provides the retrieved data from the memory to an output latch. For high-performance, single-cycle memories, the retrieved data held by the output latch is then latched by flip-flops in the external circuit on a subsequent rising edge of the clock signal. It is desirable for this read path to fit within a cycle (or perhaps a little more if the subsequent rising edge of the clock signal is delayed) and is often a critical path in high-performance systems.